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1 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas inc. 2011. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. usb port power supply controller isl6186 the isl6186 usb power controller family provides overcurrent (oc) fault protection for one or more usb ports. this product family consists of eight individual functional product variants and three package options and is operation rated for a nominal +2.5v to +5v range and specified over the full commercial and indu strial temperature ranges. each isl6186 type incorporates a 45m p-channel mosfet power switch for power control and features internal current monitoring, accurate current limiting, and current limited delay to turn-off for system supply protection along with control and communication i/o. the isl6186 family offers product variants with specified continuous output current levels of 1.5a, 3a or 3.6a, enable active high or low inputs, and latch off or automatic retry after overcurrent turn-off, making these devices well suited for many low-power applications. this family of ics is offered in an industry standard soic package as well as in the 70% smaller 3x3 dfn package, which provides the same performance and an additional power-good output feature in the smallest possible (10 ld dfn) package. features ? 2.5v to 5v operating range ? 45m integrated power p-channel mosfet switches ? continuous current options for 1.5a, 3a and 3.6a ? thermally insensitive 12ms of current limiting prior to turn-off ? output discharges with reverse current blocking when disabled ? latch-off or auto restart and enable polarity options ? 1a off-state supply current ? industry standard pin-for-pin soic and smaller dfn packages available applications ? usb port power management including usb 3.0 ? low power electronic circuit limiting and breaker d+ d- d+ d- +5v vin fault enable gnd out isl6186 u s b c o n t r o l l e r vbus vbus usb port 1 usb port_2 usb port power figure 1. typical application 0.7 0.8 0.9 1.0 1.1 1.2 1.3 -40-25 0 25457585115 temperature (c) figure 2. normalized r ds(on) temperature characteristic curve normalized r ds(on) september 1, 2011 fn7698.1
isl6186 2 fn7698.1 september 1, 2011 simplified block diagram gnd vin vin en fault out out pgd por -v comp + - current and temp. monitoring, gate, delay and output control logic pgd only on 10dfn pin configurations isl6186 (8 ld soic/dfn) top view isl6186 (10 ld dfn) top view 1 2 3 4 8 7 6 5 vin out out out flt gnd (gnd) epad dfn only vin en/en 1 2 3 4 10 9 8 7 vin out out pgd flt gnd (gnd) epad 5 6 vin out vin en/en pin descriptions pin number symbol description 8 ld soic/dfn 10 ld dfn 1 1 gnd ic ground reference 2, 3 2, 3, 4 vin chip bias, controlled voltage input, undervoltage lock out (uvlo). v in provides chip bias voltage. at v in < 1.7v, chip functionality is disabled, flt is active and floating and out is held low. range 0v to 5.5v 4 5 en/en enable/disable inputs, active high (en) and active low (en ) options enable the power switch. these inputs have internal 1m pull-off resistors. range 0v to v in
isl6186 3 fn7698.1 september 1, 2011 56 flt overcurrent fault indicator. overcurrent fault indicator. flt floats and is disabled until v in > v uvlo . this output is pulled low after the current limit time-out period has expired. fault is not signaled due to over-temperature shut down. range 0v to v in 6, 7, 8 7, 8, 9 out controlled supply output. upon an oc condition, i out is current limited. curren t limit response time is within 200s. this output will remain in current limit for a nominal 12ms before being turned off either for the latch or auto retry versions. range 0v to v in -10pgd open drain power-good output that pulls low 40ms after v out = 90% of v in and rises after v out < 85% of v in . range 0v to v in pd (dfn only) pd epad thermal dissipation expose d pad range: connect to gnd. ordering information part number (notes 1, 2, 3) part marking en/en input v in = 5v maximum continuous iout (a) latch/ auto retry power- good output temp. range (c) package (pb-free) pkg. dwg. # isl61861acbz 61861a cbz en 1.5 latch no 0 to +70 8 ld soic m8.15 isl61861bcbz 61861b cbz en 1.5 retry no 0 to +70 8 ld soic m8.15 isl61861ccbz 61861c cbz en 3 latch no 0 to +70 8 ld soic m8.15 isl61861dcbz 61861d cbz en 3 retry no 0 to +70 8 ld soic m8.15 isl61861ecbz 61861e cbz en 1.5 latch no 0 to +70 8 ld soic m8.15 isl61861fcbz 61861f cbz en 1.5 retry no 0 to +70 8 ld soic m8.15 isl61861gcbz 61861g cbz en 3 latch no 0 to +70 8 ld soic m8.15 isl61861hcbz 61861h cbz en 3 retry no 0 to +70 8 ld soic m8.15 isl61862acrz 62ac en 1.5 latch no 0 to +70 8 ld dfn l8.3x3j isl61862bcrz 62bc en 1.5 retry no 0 to +70 8 ld dfn l8.3x3j isl61862ccrz 62cc en 3 latch no 0 to +70 8 ld dfn l8.3x3j isl61862dcrz 62dc en 3 retry no 0 to +70 8 ld dfn l8.3x3j isl61862ecrz 62ec en 1.5 latch no 0 to +70 8 ld dfn l8.3x3j isl61862fcrz 62fc en 1.5 retry no 0 to +70 8 ld dfn l8.3x3j isl61862gcrz 62gc en 3 latch no 0 to +70 8 ld dfn l8.3x3j isl61862hcrz 62hc en 3 retry no 0 to +70 8 ld dfn l8.3x3j isl61863acrz 63ac en 1.5 latch yes 0 to +70 10 ld dfn l10.3x3 isl61863bcrz 63bc en 1.5 retry yes 0 to +70 10 ld dfn l10.3x3 isl61863ccrz 63cc en 3 latch yes 0 to +70 10 ld dfn l10.3x3 isl61863dcrz 63dc en 3 retry yes 0 to +70 10 ld dfn l10.3x3 isl61863ecrz 63ec en 1.5 latch yes 0 to +70 10 ld dfn l10.3x3 isl61863fcrz 63fc en 1.5 retry yes 0 to +70 10 ld dfn l10.3x3 isl61863gcrz 63gc en 3 latch yes 0 to +70 10 ld dfn l10.3x3 isl61863hcrz 63hc en 3 retry yes 0 to +70 10 ld dfn l10.3x3 isl61863icrz 63ic en 3.6 latch yes 0 to +70 10 ld dfn l10.3x3 pin descriptions (continued) pin number symbol description 8 ld soic/dfn 10 ld dfn
isl6186 4 fn7698.1 september 1, 2011 isl61863jcrz 63jc en 3.6 retry yes 0 to +70 10 ld dfn l10.3x3 isl61863kcrz 63kc en 3.6 latch yes 0 to +70 10 ld dfn l10.3x3 isl61863lcrz 63lc en 3.6 retry yes 0 to +70 10 ld dfn l10.3x3 isl61861aibz 61861a ibz en 1.5 latch no -40 to +85 8 ld soic m8.15 isl61861bibz 61861b ibz en 1.5 retry no -40 to +85 8 ld soic m8.15 isl61861cibz 61861c ibz en 3 latch no -40 to +85 8 ld soic m8.15 isl61861dibz 61861d ibz en 3 retry no -40 to +85 8 ld soic m8.15 isl61861eibz 61861e ibz en 1.5 latch no -40 to +85 8 ld soic m8.15 isl61861fibz 61861f ibz en 1.5 retry no -40 to +85 8 ld soic m8.15 isl61861gibz 61861g ibz en 3 latch no -40 to +85 8 ld soic m8.15 ISL61861HIBZ 61861h ibz en 3 retry no -40 to +85 8 ld soic m8.15 isl61862airz 62ai en 1.5 latch no -40 to +85 8 ld dfn l8.3x3j isl61862birz 62bi en 1.5 retry no -40 to +85 8 ld dfn l8.3x3j isl61862cirz 62ci en 3 latch no -40 to +85 8 ld dfn l8.3x3j isl61862dirz 62di en 3 retry no -40 to +85 8 ld dfn l8.3x3j isl61862eirz 62ei en 1.5 latch no -40 to +85 8 ld dfn l8.3x3j isl61862firz 62fi en 1.5 retry no -40 to +85 8 ld dfn l8.3x3j isl61862girz 62gi en 3 latch no -40 to +85 8 ld dfn l8.3x3j isl61862hirz 62hi en 3 retry no -40 to +85 8 ld dfn l8.3x3j isl61863airz 63ai en 1.5 latch yes -40 to +85 10 ld dfn l10.3x3 isl61863birz 63bi en 1.5 retry yes -40 to +85 10 ld dfn l10.3x3 isl61863cirz 63ci en 3 latch yes -40 to +85 10 ld dfn l10.3x3 isl61863dirz 63di en 3 retry yes -40 to +85 10 ld dfn l10.3x3 isl61863eirz 63ei en 1.5 latch yes -40 to +85 10 ld dfn l10.3x3 isl61863firz 63fi en 1.5 retry yes -40 to +85 10 ld dfn l10.3x3 isl61863girz 63gi en 3 latch yes -40 to +85 10 ld dfn l10.3x3 isl61863hirz 63hi en 3 retry yes -40 to +85 10 ld dfn l10.3x3 isl61863iirz 63ii en 3.6 latch yes -40 to +85 10 ld dfn l10.3x3 isl61863jirz 63ji en 3.6 retry yes -40 to +85 10 ld dfn l10.3x3 isl61863kirz 63ki en 3.6 latch yes -40 to +85 10 ld dfn l10.3x3 isl61863lirz 63li en 3.6 retry yes -40 to +85 10 ld dfn l10.3x3 isl61861aeval1z (isl61861c) en 3 latch no - 8 ld soic eval bd isl61862heval1z (isl61862f) en 1.5 retry no - 8 ld dfn eval bd isl61863leval1z (isl61863l) en 3.6 retry yes - 10 ld dfn eval bd notes: 1. add ?-t*? suffix for tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged products employ spec ial pb-free material sets, molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish , which is rohs compliant and compatible wi th both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std-020. 3. for moisture sensitivity level (msl), please see device information page for isl6186 . for more information on msl please see tech brief tb363 . ordering information (continued) part number (notes 1, 2, 3) part marking en/en input v in = 5v maximum continuous iout (a) latch/ auto retry power- good output temp. range (c) package (pb-free) pkg. dwg. #
isl6186 5 fn7698.1 september 1, 2011 absolute maximum rating s thermal information supply voltage (vin to gnd, note 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5v en, fault. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .vin out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . gnd - 0.3v to vin 0.3v output current . . . . . . . . . . . . . . . . . short circuit protected; limited to 5a esd rating human body model (per mil-std-883 method 3015.7) . . . . . . . . . . 3kv machine model (per mil-std-883 method 3015.7) . . . . . . . . . . . . 300v latch up (tested per jesd-78b; class 2, level a) . . . . . . . . . . . . . . 100ma operating conditions commercial temperature range . . . . . . . . . . . . . . . . . . . . . . 0c to +70c industrial temperature range . . . . . . . . . . . . . . . . . . . . . . . -40c to +85c supply voltage range (typical). . . . . . . . . . . . . . . . . . . . . . . . . 2.5v to 5.5v thermal resistance (typical) ja (c/w) jc (c/w) 8 lead soic package (note 4) . . . . . . . . . . 120 n/a 8 lead 3x3 dfn package (notes 5, 6) . . . 48 6 10 lead 3x3 dfn package (notes 5, 6) . . 48 6 maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150c maximum storage temperature range . . . . . . . . . . . . . . -65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/ pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 5. ja is measured in free air with the componen t mounted on a high effective thermal conduc tivity test board with ?direct attach? fe atures. see tech brief tb379 . 6. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. 7. all voltages are relative to gnd, unless otherwise specified. electrical specifications v in = 5v, t a = t j , unless otherwise specified. boldface limits apply over the operating temperature range, 0c to +75c or -40c to +85c . symbol parameter test conditions min (note 8) typ max (note 8) units power switch r ds(on)_50 on-resistance at 5.0v (pulse tested) v in = 5v, i out = 0.5a, t a = t j = +25c - 45 48 m t a = t j = +85c - 50 54 m r ds(on)_33 on-resistance at 3.3v (pulse tested) v in = 3.3v, i out = 0.5a, t a = t j = +25c - 54 57 m t a = t j = +85c - 61 64 m r ds(on)_25 on resistance at 2.5v (pulse tested) v in = 2.5v, i out = 0.5a, t a = t j = +25c - 65 69 m t a = t j = +85c - 74 79 m v out_dis disabled output voltage v in = 5v, switch disabled, 50a load - 22 45 mv r out_pd output pull-down resistor v in = 5v, switch disabled 3.4 5 6 k t r v out rise time r l = 10 , c l = 10f, 10% to 90% - 10 - s t f slow v out turn-off fall time r l = 10 , c l = 10f, 90% to 10% - 200 - s current control i out_cont_5 maximum continuous current, v in =5v guaranteed by the minimum i trip current specification isl6186xa, b, e, f - - 1.5 a i out_cont_5 isl6186xc, d, g, h - - 3.0 a i out_cont_5 isl6186xi, j, k, l (10 ld dfn) - - 3.6 a i out_cont_3 maximum continuous current, v in =3.3v guaranteed by the minimum i trip current specification isl6186xa, b, e, f - - 1.5 a i out_cont_3 isl6186xc, d, g, h - - 2.5 a i out_cont_3 isl61861i, j, k, l (10 ld dfn) - - 2.7 a i out_cont_2 maximum continuous current, v in =2.5v isl6186xa, b, e, f - 1.2 - a i out_cont_2 isl61861c, d, g, h (soic) - 1.8 - a i out_cont_2 isl61862, isl61863 c, d, g, h (dfn) - 2 - a i out_cont_2 isl61863i, j, k, l (10 ld dfn) - 2 - a
isl6186 6 fn7698.1 september 1, 2011 i trip_5 trip current, v in = 5v isl6186xa, b, e, f 1.7 2.5 3.3 a i trip_5 isl6186xc, d, g, h 3.0 3.9 4.5 a i trip_5 isl61863i, j, k, l (10 ld dfn) 3.7 3.9 5.0 a i trip_3 trip current, v in = 3.3v isl6186xa, b, e, f 1.7 2.1 2.7 a i trip_3 isl6186xc, d, g, h 2.8 3.5 4.0 a i trip_3 isl61863i, j, k, l (10 ld dfn) 3.5 3.9 4.3 a i trip_2 trip current, v in = 2.5v isl6186xa, b, e, f - 1.8 - a i trip_2 isl6186xc, d, g, h - 3.2 - a i trip_2 isl61863i, j, k, l (10 ld dfn) - 3.4 - a i lim_5 current limit, v in = 5v isl6186xa, b, e, f, v in - v out = 1v 1.37 1.6 1.81 a i lim_5 isl6186xc, d, g, h, v in - v out = 1v 2.82 3.1 3.42 a i lim_5 isl61863i, j, k, l, (10 ld dfn) v in - v out = 1v 3.24 3.6 4.00 a i lim_3 current limit, v in = 3.3v isl6186xa, b, e, f, v in - v out = 1v 1.35 1.5 1.77 a i lim_3 isl6186xc, d, g, h, v in - v out = 1v 2.72 3.0 3.35 a i lim_3 isl61863i, j, k, l (10 ld dfn), v in - v out = 1v 3.22 3.5 3.95 a i lim_2 current limit, v in = 2.5v isl6186xa, b, e, f, v in - v out = 1v 1.30 1.5 1.70 a i lim_2 isl6186xc, d, g, h, v in - v out = 1v 2.55 2.9 3.14 a i lim_2 isl61863i, j, k, l (10 ld dfn), v in - v out = 1v 3.07 3.3 3.75 a i sc_5 short circuit current, v in = 5v isl6186xa, b, e, f, v out = 0v 1.45 2.0 2.35 a i sc_5 isl6186xc, d, g, h, v out = 0v 2.60 3.4 4.50 a i sc_5 isl61863i, j, k, l (10 ld dfn), v out = 0v 2.48 3.5 5.00 a i sc_3 short circuit current, v in = 3.3v isl6186xa, b, e, f, v out = 0v 0.95 1.2 1.50 a i sc_3 isl6186xc, d, g, h, v out = 0v 1.95 2.2 2.70 a i sc_3 isl61863i, j, k, l (10 ld dfn), v out = 0v 2.00 2.5 3.00 a i sc_2 short circuit current, v in = 2.5v isl6186xa, b, e, f, v out = 0v - 1.1 - a i sc_2 isl6186xc, d, g, h, v out = 0v - 2.1 - a i sc_2 isl61863i, j, k, l, (10 ld dfn) v out = 0v - 2.4 - a tsett ilim oc to limit settling time v in /r l = 2i lim , c l = 10f to within 10% of i lim -200- s tsett ilim_sev severe oc to limit settling time v in /r l = 4i lim , c l = 10f to within 10% of i lim -30- s t cl current limit duration i out = i lim 9.2 12 15 ms t rty automatic retry period 0.80 1 1.35 s i/o parameters vfault_lo fault output voltage fault i out = 10ma - - 0.45 v ifault fault leakage -5 - a venr_5 enable/enable rising threshold v in = 5v 1.5 1.8 2 v hys_venr_5 en/en threshold hysteresis v in = 5v 65 140 175 mv venr_3 enable/enable rising threshold v in = 3.3v 1.0 1.3 1.6 v hys_venr_3 en/en threshold hysteresis v in = 3.3v 30 80 120 mv venr_2 enable/enable rising threshold v in = 2.5v 0.95 1.1 1.3 v hys_venr_2 en/en threshold hysteresis v in = 2.5v 10 70 110 mv electrical specifications v in = 5v, t a = t j , unless otherwise specified. boldface limits apply over the operating temperature range, 0c to +75c or -40c to +85c . (continued) symbol parameter test conditions min (note 8) typ max (note 8) units
isl6186 7 fn7698.1 september 1, 2011 introduction the isl6186 is a single channel overcurrent (oc) fault protection ic for the +2.5v to +5v environment. each isl6186 has a 45m p-channel mosfet power switch fo r power control. an enabling input and fault reporting output compatible with 2.5v to 5v logic allows for external control and reporting. this device features an integrated power switch with current monitoring, accurate current limiting, reverse bias protection, and current limited timed delay to turn-off for system reliability. see figures 11 through 27 for typical operational waveforms including both undercurrent and overcurrent situations. the isl6186 offers current sense and limiting with v in =5v to guarantee continuous current levels of 1.5a, 3a and 3.6a, making these devices well suited for a myriad of usb and other low-power (18w max) port power management applications and configurations. the isl6186 also provides thermally insensitive timed oc turn-off and fault notification, isolating and protecting the voltage bus in the event of a peripheral oc or short circuit independent of the ambient thermal condition. the isl6186 undervoltage lockout feature prevents turn-on of the output unless the correct enable state and v in > v uvlo are present. during initial turn-on, the isl6186 prevents false fault reporting by blanking the fault signal. during operation, once an oc co ndition is detected, the output is current limited for t cl to allow transient oc conditions to pass. if still in current limit af ter the current limit period has elapsed, the output is then turn ed off and the fault is reported by pulling the fault output low. on the latch-off options, after turn-off, both the output and the fault signal are latched low until reset by the enable signal being de-asserted or a por occurring. at this time, the fault signal will clear and the switch is ready to be turned back on. on the auto restart options, the isl6186 will attempt to periodically turn on the output as long as th e enable is asserted. when disabled, the isl6186 has a low quiescent supply current and output to input reverse current flow blocking capability. the isl6186 family is provided with enable polarity options and an industry standard 8 ld soic pinout along with two versions in the 70% smaller 3x3 dfn. the 8 ld dfn package offers the same performance as the 8 ld soic whereas the 10 ld dfn offers higher current capability in the smallest possible package due to its lower package electrical and thermal resistance. additionally, the 10 ld dfn has a power-good output pgd that pulls low 40ms after v out >90% of v in and rises after v out <85% of v in . ren_h enable pull-down resistor enable asserted high options 0.6 1 1.55 m ren_l enable pull-up resistor enable asserted low options 0.6 1 1.55 m t on enable to output turn-on time r l = 10 , c l = 10f, enable 50% to output 90% - 0.1 - ms t off enable to output turn-off time r l = 10 , c l = 10f, enable 50% to output 10% - 0.25 - ms t pdpgr enable to power good output rising time disable to power-good de-assert - 30 - ns pg vth power good threshold pgd pulls low when v out /v in 88 91 95 % pgn vth power not good threshold pgd release high when v out /v in 78 86 93 % t vthr2pg pg vth to pg falling pg delay after pg vth - 1.5 - s t vthf2pg pgn vth to pg rising pg delay after pgn vth - 45 - s bias parameters i vdd enabled v in current switches closed, output = open - 57 75 a i vdd disabled v in current switches open, output = open - 3.5 5.5 a v uvlo rising por threshold v in rising to functional operation - 2.1 2.3 v i vr reverse blocking leakage current v in = 0v, v out = 5v - 0.3 2.0 a temp_dis over-temperature disable - 150 - c temp_hys over-temperature hysteresis - 20 - c note: 8. compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. electrical specifications v in = 5v, t a = t j , unless otherwise specified. boldface limits apply over the operating temperature range, 0c to +75c or -40c to +85c . (continued) symbol parameter test conditions min (note 8) typ max (note 8) units
isl6186 8 fn7698.1 september 1, 2011 functional description power on reset (por) the isl6186 por feature inhibits device functionality when v in v in , there will be no output to input current flow, nor will the output voltage appear on the input. soft-start upon enable, the voltage on the vout pin will ramp up according to the equation: i lim /c out (v/s). resistive or active load will slow the v out ramp-up toward the top of its curve. fault blanking on start-up during initial turn-on, the isl6186 prevents nuisance faults being reported to the system controller by blanking the fault signal until the internal fet is fully enhanced. current trip and limiting levels the isl6186 provides integrated current sensing in the mosfet, which allows for rapid control of oc events. once an oc condition is detected, the isl6186 goes into its current limiting (cl) control mode. the isl6186 is variant specified to allow a continuous current (i cont ) operation of 1.5a, 3a or 3.6a. as the current increases past its continuous curre nt rating, it will reach a level that causes the device to enter its current limit mode; that is, the current trip level. the current trip level is in all cases adequately above the i cont rating so as not to cause unintended false faults. the current limit is specified at v out = v in - 1v to test a known representative condition and is featured at a nominal value slightly higher than the continuo us current rating. the speed of this current limiting control is inversely related to the magnitude of the oc fault. thus, a hard overcurrent is more quickly pulled to its limiting value than a marginal oc condition. over-temperature shutdown although the isl6186 has an over-temperature shutdown and lockout feature because of the 12ms timed shutdown, the thermal shutdown is likely only to be invoked in extremely high ambient temperatures. fault does not respond to ot events. the over- temperature protection invokes and disables the switch turn-on operation. once the die temperature is ~+140c, it will turn off an already on switch at ~+150c and releases the part to operation once the die temperature falls to ~+120c. turn-off time delay during operation, once an oc co ndition is detected, the output is current limited for ~12ms to a llow transient oc conditions to pass. if still in current limit and after the current limit period has elapsed, the output is then turned off, and the fault is reported by pulling the fault output low. the internal 12ms timer starts upon current limiting and is independent of ambient or ic thermal conditions, thus providing more consistent operation over the entire temperature range. latch-off restart/auto-restart start after turn-off, with the latch-off options, both the output and the fault signal are latched low until reset by the enable signal being de-asserted, at which time the fault signal will clear and the ic is ready for enable to asse rt. on the auto-restart options, the isl6186 will attempt to periodically turn on the output at approximately 1s intervals as long as the enable is asserted. if the oc condition remains indefinite ly, so will the fault indication and the restart attempts, until such time as the thermal protection feature is invoked, th us increasing the restart period. power-good output this feature is an active low, open-drain, power-good indicator that asserts after v out /v in >90% and de-asserts when v out /v in < 85%. it immediately de-asserts upon the ic being disabled. active output pull-down another isl6186 feature is the 10k active pull-down on the outputs to <60mv above gnd when the device is disabled, thus ensuring discharge of the load. typical performance curves figure 3. switch on-resistance at 0.5a figure 4. normalized switch resistance 85 80 75 70 65 60 55 50 45 40 35 -40-25 0 25457585115 temperature (c) r ds(on) @ 0.5a (m ? ) v in = 2.5v v in = 3.3v v in = 5v 0.7 0.8 0.9 1.0 1.1 1.2 1.3 -40-25 0 25457585115 temperature (c) normalized r ds(on)
isl6186 9 fn7698.1 september 1, 2011 figure 5. 1.5a continuous current characteristics figure 6. 3a continuous current characteristics figure 7. 3.6a continuous current characteristics figure 8. limiting current 3 sigma, v in = 5v. figure 9. limiting current 3 sigma, v in = 5v figure 10. limiting current 3 sigma, v in = 5v typical performance curves (continued) temperature (c) output current (a) 1.0 1.5 2.0 2.5 3.0 -40 25 85 5v i trip 3.3v i trip 5v i sc 2.5v i trip 5v i lim 2.5v i lim 3.3v i sc 3.3v i lim 2.5v i sc 1.5 2.0 2.5 3.0 3.5 4.0 -40 25 85 temperature (c) output current (a) 5v i trip 3.3v i trip 2.5v i trip 5v i sc 3.3v i sc 2.5v i sc 5v i lim 2.5v i lim 3.3v i lim 2.0 2.5 3.0 3.5 4.0 4.5 -40 25 85 temperature (c) output current (a) 5v i sc 3.3v i trip 5v i lim 3.3v i lim 2.5v i trip 2.5v i lim 3.3v i sc 2.5v i sc 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 1.75 -40 25 85 i l i m i t 3 s i g m a ( a ) temperature (c) +3sigma typical -3sigma 1.5a continuous i out version 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 -40 25 85 i l i m i t 3 s i g m a ( a ) temperature (c) +3sigma typical -3sigma 3a continuous i out version 3.50 3.55 3.60 3.65 3.70 3.75 3.80 3.85 3.90 -40 25 85 i l i m i t 3 s i g m a ( a ) temperature (c) 3.6a continuous i out version +3sigma typical -3sigma
isl6186 10 fn7698.1 september 1, 2011 figure 11. 1.5a variant i lim waveform figure 12. 3a variant i lim waveform figure 13. 3.6a variant i lim waveform w pg figure 14. lisl6186 turn-on w pg figure 15. v out turn-on/rise time vs c load . v in = 5.5v, r l = 10 figure 16. v out turn-off/fall time vs c load . v in = 5.5v, r l = 10 typical performance curves (continued) en fault vout iin en fault vout i in pg fault v out i in en fault v out i in pg c l =100f c l =10f en c l =100f c l =10f en
isl6186 11 fn7698.1 september 1, 2011 figure 17. oc ramp rate i lim waveforms figure 18. peak current settling times figure 19. turn-on into an overcurrent figure 20. turn-on into momentary oc figure 21. overcurrent retry function figure 22. turn-off w pg typical performance curves (continued) i load = 2.75a i limit = 3.42a 1.6a/ms 16a/ms 78a/ms 3a variant i load = 3.2a i limited 0.5a oc 1a oc 300s 2a oc 4a oc 137s 60s 32s 3a variant en fault v out i in 3a variant en fault v out i in 3a variant en fault v out i in v out pg en i in
isl6186 12 fn7698.1 september 1, 2011 figure 23. v in = 2.4v turn-on into 0.88 figure 24. turn-on into to 18wload typical performance curves (continued) en v out i in r l =1.3w, c l = 200f i in = 3.8a v out en 3.6a variant test circuits figure 25a. r ds(on) figure 25b. current limiting figure 25. dc test circuit figure 26a. transient test circuit figure 27. transient wave form measurement points 5v output isl6186 en vin flt 10k 10 10f out v - + r ds(on) = v/(v out /10 ) 5v output isl6186 en vin flt 10k 10 10f out r l sized for desired oc level r l 5v output isl6186 en vin flt 10k 10 10f 0-v in out vin 0v 0.5vin 0.5vin vin gnd output t on t off output t r vin -gnd 90% 90% t f 10% 10% en 90% 10%
isl6186 13 fn7698.1 september 1, 2011 application information using the isl6186eval1z platform general and biasing information there are three evaluation platforms for the isl6186 family. there is one for each package style, each with a different continuous output current level and representing a mix of enable polarity and output retry or latc h options. the standard available evaluation board options are liste d at the end of the ordering information table, which starts on page 3. figure 28a illustrates the schematic for the 10 ld dfn isl61863eval1z. other than the unique pgood output on the isl61863 types, all the schematics and functions are th e same across all three package types. consult the individual pa ckage pinouts on page 2 for those differences. the evaluation platform is bias ed and monitored through a few labeled test points. see table 1 for test point assignments and descriptions. upon proper bias of the evaluati on platform and correct enabling of the ic, the isl6186 will have a nominal v in /5.1 load current that is below the continuous current rating passing through each enabled switch. see figures 14 to 16 for typical isl6186 turn-on and turn-off waveforms. external current loading in excess of the trip current level for the particular part being evaluated will result in the isl6186 entering current limiting mode. figure 11 illustrates current limiting mode for the isl6186 product variants with 1.5a of continuous load current rating. the scope shot sh ows current limiting for ~12ms before it is turned off and the fault signal is asserted. application considerations see table 2 for a listing of is l6186xeval1z board components. decoupling v in application considerations for the isl6186 family are widely accepted best industry practices. good decoupling practices on the v in pin must be followed by placement close to the ic, with at least 2.2f being recommended. for the 3.0 and 3.6a versions, at least 33f is recommended to prevent spiking and glitching on v in during an oc event. use good pcb layout practices to reduce input and output inductance to the isl6186. loading v out when designing with the 3a and 3.6a versions in an implementation in which the output may be unloaded (open) while the isl6186 is turned on, a minimum of 4.7f of capacitive loading is recommended to prevent high dv/dt from unnecessarily activating the surge/esd circuitry. continuous current ratings the isl6186 provides several continuous current rated devices specified at v in = 5v: these are the 1.5a, 3a and 3.6a options, which are capable over the entire temperature extreme. at v in = 3.3v, current capability is degraded, and the isl6186 is specified at 1.5a and 3a. at v in = 2.5v, there are no specifications, but a typical value is provided in the specification table as guidance for +25c operat ion. this degraded capability is due to the higher r ds(on) of the fet switch at the lower bias voltage. enhanced thermal characteristic s and an increased number of bond wires allows the 10 ld dfn to have a higher current capability than either th e 8 ld soic or 8 ld dfn. isl61863eval1z schematic and photo figure 28a. isl61863eval1z schematic figure 28b. isl61863eval1z board photo figure 28. isl61863eval1z schematic and isl61863eval1z photograph * note: * pgd output only available on isl61863 types gnd vin gnd out flt en pg table 1. isl61863eval1z test point assignments tp name description gnd eval board and ic gnd vin eval board, ic bias and power input en enable switch out switch power output pg power-good output flt fault output
isl6186 14 fn7698.1 september 1, 2011 table 2. isl6186xeval1z board component listing component designator component function component description u1 isl6186 intersil, isl6186 r1 output load resistor 5.1 , 5%, 3w r2 flt output pull-up resistor 10k , 0805 r3 * only on isl61863eval1z pgd output pull-up resistor 10k , 0805 c1 decoupling capacitor 2.2 f on isl61862eval1z 33 f on isl61861eval1z and isl61863eval1z c2 load capacitor 10f 16v electrolytic, radial lead
isl6186 15 intersil products are manufactured, assembled and tested utilizing iso9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn7698.1 september 1, 2011 for additional products, see www.intersil.com/product_tree products intersil corporation is a leader in the design and manufacture of high-performance analog semico nductors. the company's product s address some of the industry's fastest growing markets, such as , flat panel displays, cell phones, handheld products, and noteb ooks. intersil's product families address power management and analog sign al processing functions. go to www.intersil.com/products for a complete list of intersil product families. *for a complete listing of applications, related documentation an d related parts, please see the respective device information page on intersil.com: isl6186 to report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff fits are available from our website at http://rel.intersil.com/reports/search.php revision history the revision history provided is for inform ational purposes only and is believed to be accurate, but not warranted. please go t o web to make sure you have the latest rev. date revision change 9/1/11 fn7698.1 initial release to web.
isl6186 16 fn7698.1 september 1, 2011 package outline drawing l8.3x3j 8 lead dual flat no-lead plastic package rev 0 9/09 located within the zone indicated. the pin #1 identifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" typical recommended land pattern top view side view c 0 . 2 ref 0 . 05 max. 0 . 00 min. 5 3.00 a b 3.00 (4x) 0.15 6 pin 1 index area pin #1 index area 6x 0.65 1.64 +0.10/ - 0.15 8 1 8x 0.400 0.10 6 max 1.00 see detail "x" 0.08 0.10 c c c ( 2.80 ) (1.64) ( 8 x 0.30) ( 8x 0.60) ( 2.38 ) ( 1.95) 2.38 0.10 8x 0.30 a mc b 4 2x 1.950 +0.10/ - 0.15 (6x 0.65) 4 5 pin 1
isl6186 17 fn7698.1 september 1, 2011 package outline drawing l10.3x3 10 lead dual flat package (dfn) rev 6, 09/09 located within the zone indicated. the pin #1 indentifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 id entifier is optional, but must be between 0.18mm and 0.30mm from the terminal tip. lead width applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: bottom view detail "x" side view typical recommended land pattern top view (4x) 0.10 index area pin 1 pin #1 index area c seating plane base plane 0.08 see detail "x" c c 5 6 6 a b 0.10 c 1 package 1.00 0.20 8x 0.50 2.00 3.00 (10x 0.23) (8x 0.50) 2.00 1.60 (10 x 0.55) 3.00 0.05 0.20 ref 10 x 0.23 10x 0.35 1.60 outline max (4x) 0.10 ab 4 c m 0.415 0.23 0.35 0.200 2 4
isl6186 18 fn7698.1 september 1, 2011 package outline drawing m8.15 8 lead narrow body small outline plastic package rev 3, 3/11 detail "a" top view index area 123 -c- seating plane x 45 notes: 1. dimensioning and tolerancing per ansi y14.5m-1982. 2. package length does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 3. package width does not include interlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 4. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 5. terminal numbers are shown for reference only. 6. the lead width as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 7. controlling dimension: millimeter. co nverted inch dimensions are not necessarily exact. 8. this outline conforms to jedec publication ms-012-aa issue c. side view ?a side view ?b? 1.27 (0.050) 6.20 (0.244) 5.80 (0.228) 4.00 (0.157) 3.80 (0.150) 0.50 (0.20) 0.25 (0.01) 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 0.25(0.010) 0.10(0.004) 0.51(0.020) 0.33(0.013) 8 0 0.25 (0.010) 0.19 (0.008) 1.27 (0.050) 0.40 (0.016) 1.27 (0.050) 5.20(0.205) 1 2 3 4 5 6 7 8 typical recommended land pattern 2.20 (0.087) 0.60 (0.023)

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